By Charles Chiang, Jamil Kawa

This e-book walks the reader via all of the elements of manufacturability and yield in a nano-CMOS procedure. It covers all CAD/CAE facets of a SOC layout circulation and addresses a brand new subject (DFM/DFY) serious at ninety nm and past. This booklet is a needs to learn e-book the intense training IC clothier and a very good primer for any graduate scholar cause on having a occupation in IC layout or in EDA instrument improvement.

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First we briefly cover the traditional approach of wire spreading which is a direct derivative of the traditional way of extracting CA. 1 which has a higher level of accuracy and a much shorter execution time. 1 Traditional Routing and Post Routing Short CA Yield Improvement Utilizing the available output of the traditional approaches for short CA extraction there are two main methodologies for routing and post routing short CA improvement [28–30]. One methodology starts with the extracted critical area value for one particular defect size, re-positioning a wire, and evaluates 37 Improving Critical Area the impact of the repositioning of the wire on the short CA to come up with the optimal wire position.

This alternative cell is given an appropriate yield grade as well. So, a yield grade will be an added arc for standard cells along the classical arcs of delay, power, area, and rise/fall time. This procedure is repeated throughout the whole design flow. An interesting issue arises when some alternatives have conflicting outcomes. An example of that will be the routing area where a procedure such as wire widening might improve the CA “opens” score of the design but worsens the CA “shorts” score of the design.

The approximate method on the other hand is close enough in accuracy especially when the CA calculation is needed to be performed in short order to make a decision in the routing stage for example among alternative options for the purpose of improving CA associated yield, yet it is computationally very efficient. Another benefit of the approximate method is that it makes CAA driven layout optimization possible. 1 Classical Methods of CA Extraction The shape expansion based method is designed to compute the critical area for a particular given defect size.

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